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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-13213-1E
Linear IC Converter
CMOS
D/A Converter for Digital Tuning
(Compatible with I2C Bus)
MB88141A
s DESCRIPTION
The FUJITSU MB88141A is an 8-bit D/A converter with 12 built-in channels. The 12 analog output channels have built-in OP Amps, providing large current drive capability. Data input is compatible with I2C specifications, and is controlled by two control lines. The built-in I/O expander function allows the MB88141A to be controlled by devices incompatible with I2C bus specifications (provides conversion between I2C serial and 8- or 4-bit parallel I/O). The MB88141A is ideal for replacing electronic knob or pre-set variable resistance tuning devices.
s FEATURES
* * * * * Ultra-low power consumption (0.9 mW/channel Typ.) Ultra-compact package Built-in 12-channel R-2R type 8-bit D/A converter Built-in analog output amplifier (maximum sink current 1.0 mA, maximum source current 1.0 mA) Analog output range 0 V to VCC
(Continued)
s PACKAGES
24-pin plastic DIP 24-pin plastic SOP 24-pin plastic SSOP
(DIP-24P-M02)
(FPT-24P-M01)
(FPT-24P-M03)
"Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips."
MB88141A
(Continued) * 5 V single power supply * Power supply/GND for MCU interface and OP Amp is separate from power supply/GND for D/A converter * Power supply for D/A converter is divided into two systems for VDDI/VSSI (AO1 to AO4) and VDD2/VSS2 (AO5 to AO12) , allowing separate level settings for each system * Compatible with serial data input, I2C specifications * Built-in I/O expander function (converts between I2C serial and 8-or 4-bit parallel) * CMOS process * Packages : DIP 24-pin, SOP 24-pin, SSOP 24-pin
2
MB88141A
s PIN ASSIGNMENT
(Top View)
AO1 AO2 AO3 AO4 AO5/D7 AO6/D6 AO7/D5 AO8/D4 AO9/D3 AO10/D2 AO11/D1 AO12/D0 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 GND VSS1 VDD1 SDA SCL MOD CS2 CS1 CS0 VDD2 VSS2 VCC
(DIP-24P-M02) (FPT-24P-M01) (FPT-24P-M03)
3
MB88141A
s PIN DESCRIPTION
Pin no. 21 20 19 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 24 22 23 15 14 Symbol SDA SCL MOD CS0 CS1 CS2 AO1 AO2 AO3 AO4 AO5/D7 AO6/D6 AO7/D5 AO8/D4 AO9/D3 AO10/D2 AO11/D1 AO12/D0 VCC GND VDD1 VSS1 VDD2 VSS2 Circuit Type C B A I/O I/O I I Description I2C bus data input/output pin (hysteresis input). Outputs the acknowledge signal. I2C bus shift clock input pin (hysteresis input) . D/A converter and I/O expander mode switching pin. *1, *2 Input "L" to operate as a D/A converter, "H" to operate as I/O expander and D/A converter. These pins set the lower 3 bits of the slave address. *1 This allows up to eight MB88141A chips to be used on the same bus line.
A
I
D
O
8-bit D/A outputs with OP Amp. *2
E
I/O
8-bit D/A outputs with OP Amp. *2 In I/O expander operation, these pins function as parallel data input/output pins.
Power supply GND Power supply Power supply Power supply Power supply

Power supply pin for digital circuits and OP Amp. GND pin for digital circuits and OP Amp. Reference power supply pin for D/A converter (H) . AO1 to AO4. Reference power supply pin for D/A converter (L) . AO1 to AO4. Reference power supply pin for D/A converter (H) . AO5 to AO12. Reference power supply pin for D/A converter (L) . AO5 to AO12.
*1: The MOD and CS0-CS2 pins should be used with fixed level input. *2: When using the I/O expander function together with the D/A converter function, take care that D/A converter output precision is within a range that will not affect overall system operation.
4
MB88141A
s BLOCK DIAGRAM
SDA SCL CS2 CS1 CS0 MOD
I2C Bus Interface D/A & I/O Control Logic
D0 1 ch 8-bit latch
D7
D0 4 ch 8-bit latch
D7
D0 5 ch 8-bit latch
D7
D0 12 ch 8-bit latch
D7
VDD1 VSS1
R-2R ladder circuit
R-2R ladder circuit
R-2R ladder circuit
R-2R ladder circuit
VDD2 VSS2
-
+
-
+
-
+
-
+
VCC GND
8
AO1
AO4
D7/AO5
D0/AO12
5
MB88141A
s I/O CIRCUIT TYPE
Type Circuit
Pch Tr
Remarks
A
Nch Tr Digital input
Input dedicated pin
Pch Tr
B
Nch Tr Digital input
Input dedicated pin * I2C bus pin * Hysteresis input
Pch Tr
C
Nch Tr
Digital output
Input/output pin * I2C bus pin * Hysteresis input * N-ch open drain output
Digital input
Pch Tr
Analog output
D
Nch Tr
Analog output
Analog output pin
Analog feedback
(Continued)
6
MB88141A
(Continued) Type
Circuit
Pch Tr Analog/digital output Analog/digital output
Remarks
E
Nch Tr
Analog/digital input/output pin
Analog feedback Mode control Digital input
Note : Circuit types B and C are I2C bus pins. Caution should be taken in using these pins because when the VCC power is off current from the I2C bus line power supply VCCS can enter the VCC side of the device power supply.
VCCS
VCCS
SDA (I2C bus line) SCL (I2C bus line)
VCC
VCC
VCC
MB88141A
7
MB88141A
s DATA CONFIGURATION
The MB88141A has the following data configuration the two operating modes (D/A converter (12-channel) and I/O expander plus D/A converter), selected by the MOD pin.
1. For D/A Converter (12-channel) Operation (MOD = "L")
(1) I2C Bus Format First S6 S S0 R/W 0 A C7 Channel selection (8 bits) C0 A D7 D/A data (8 bits) D0 A Last P
Slave address (7 bits)
: Sent from master device S : "Start" condition P
: Sent from MB88141A (slave device) : "Stop" condition A : "Acknowledge" output
(2) Slave Address Comparison (7 bits) Slave address input (7 bits) S6 1 1 1 1 1 1 1 1 S5 0 0 0 0 0 0 0 0 S4 0 0 0 0 0 0 0 0 S3 1 1 1 1 1 1 1 1 S2 0 0 0 0 1 1 1 1 S1 0 0 1 1 0 0 1 1 S0 0 1 0 1 0 1 0 1 = = = = = = = = 1 1 1 1 1 1 1 1
Internally fixed 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Externally set 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1
CS6 CS5 CS4 CS3 CS2 CS1 CS0
Address comparison: Operates only for devices whose own slave address (internally fixed CS6 to CS3 and externally set CS2 to CS0) matches the slave address input value. (3) R/W Selection (1 bit) Fixed at "0" (the D/A converter performs write operations only) .
8
MB88141A
(4) Channel Selection (8 bits) C7 C6 C5 C4 C3 C2 x x x x x x x x x x x x x x x x x x x x x x x x 0 0 1 1 1 1 0 0 1 1 1 1
C1 0 0 0 0 1 1
C0 0 1 0 1 0 1
Channel select All channels selected *1 AO1 selected AO12 selected Don't Care Don't Care All channels selected *2 XXXX0000 A D/A data (8 bits)
x : Don't Care *1: The 1 byte of data following the channel selection is set on all channels (all channels set to same data value) . S Slave address (7 bits) 0 A A P
*2: The 12 bytes of data following the channel selection are set on all channels (all channels set to separate data values) . S Slave address 0 A X X X X1 1 1 1 A AO1 data A AO12 data A P
: Sent from master device S : "Start" condition P
: Sent from MB88141A (slave device) : "Stop" condition A : "Acknowledge" output
Note: Setting will repeat, continuing in order from ch1, until the start and stop conditions are acknowledged. (5) D/A Data (8 bits) D7 D6 D5 D4 D3 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1
D2 0 0 0 1 1
D1 0 0 1 1 1
D0 0 1 0 0 1
D/A output VSS (VREF / 256) x 1 + VSS (VREF / 256) x 2 + VSS (VREF / 256) x 254 + VSS (VREF / 256) x 255 + VSS
Note: VREF = VDD - VSS
9
MB88141A
2. For D/A Converter + I/O Expander Operation (MOD = "H")
(1) I2C Bus Format First S6 S First S6 S S0 R/W 1 A S0 R/W 0 A D7 C7 Channel selection (8 bits) D0 A C0 A Last P D7 D0 A Last P Slave address (7 bits) Digital data (8 bits)
Slave address (7 bits)
Digital data (8 bits)
: Sent from master device S : "Start" condition P
: Sent from MB88141A (slave device) : "Stop" condition A : "Acknowledge" output
(2) Slave Address Comparison (7 bits) Slave address comparison is the same as for D/A converter (12-channel) operation (see "1. (2) "Slave Address Comparison"), with the exception that the CS2 setting determines the number of D/A converter channels and the number of I/O expander bits. CS2 D/A converter I/O expander 0 1 4 channels (AO1 to AO4) 8 channels (AO1 to AO8) 8 bits (D7 to D0) 4 bits (D3 to D0)
When CS2 = "1" is selected, the upper 4 bits (D7 to D4) of write operations (I2C bus to parallel interface) are ignored, and the upper 4 bits of read operations (parallel interface to I2C bus) are output at "0" (low) . (3) R/W Selection (1 bit) R/W 0 1 I/O expander operation I2C bus input parallel data output Parallel data input I2C bus output D/A converter operation I2C bus input analog output
10
MB88141A
(4) Channel Selection (8 bits) C7 x x x x x x x x C6 x x x x x x x x C5 x x x x x x x x C4 x x x x x x x x C3 0 0 0 0 1 1 1 1 C2 0 0 1 1 0 0 1 1 C1 0 0 0 0 0 0 1 1 C0 0 1 0 1 0 1 0 1 Channel select I/O expander operation AO1 selected AO4 selected Don't care (AO5 selected) Don't care (AO8 selected) Don't Care Don't Care I/O expander continuous operation A Digital data A
( ): When using D/A converter 8 channel, I/O expander 4 bit operation. x : Don't Care (5) D/A Data (8 bits) Same as "1 (5) D/A Data (8 bits)". (6) I/O Expander Continuous Operation I2C bus input parallel data output S Slave address 0 A X X X X1 1 1 1 Digital data A P
Note: In continuous operation, operation continues until start and stop conditions are acknowledged. Parallel data input I2C bus output Slave S 1 A Digital data address : Sent from master device S : "Start" condition P
A
Digital data
A
Digital data
A
P
: Sent from MB88141A (slave device) : "Stop" condition A : "Acknowledge" output
11
MB88141A
s TIMING DIAGRAM (I2C BUS SPECIFICATIONS)
"Start" condition SDA input SCL input S6 S5 S4 S3 Data change S2 S1 "Acknowledge" response S0 R/W ACK C7 C6 C5 "Acknowledge" response C0 ACK D7 D6 "Acknowledge" "Stop" response condition D0 ACK
1
2
3
4
5
6
7
8
9
10
11
12
17
18
19
20
26
27
Delay AO1 to AO12 D0 to D7 output D0 to D7 input SDA output Analog output Delay HiZ state Load data HiZ input DX "Acknowledge" response ACK D7 Load data Digital output
HiZ state
D6
D5
D0
D7
D6
D0
D7
Note: * The SDA input acknowledge response (ACK) is an output signal from the MB88141A. * The D0-D7 input and output timing represent the timing of switching to write and read operations respectively. Also, D0-D7 input remains in HiZ state between the end of a read operation and the acknowledgment of the next I/O write signal.
s ANALOG OUTPUT VOLTAGE RANGE
R-2R ladder circuit VDD1&VDD2
Operating Amp circuit VCC ( = VDD1, VDD2)
Analog output range
VSS1&VSS2
GND ( = VSS1, VSS2)
12
MB88141A
s ABSOLUTE MAXIMUM RATINGS
Parameter Symbol VCC Supply voltage Input voltage Output voltage Power consumption Operating temperature Storage temperature *: VCC VDD1 VSS1, VCC VDD2 VSS2 WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. VDD VSS VIN VOUT PD Ta Tstg With reference to GND, at Ta = +25 C Conditions Rating Min. -0.3 -0.3 -0.3 -0.3 -0.3 -20 -55 Max. +7.0 * +7.0 * +7.0 * VCC + 0.3 VCC + 0.3 250 +85 +120 Unit V V V V V mW C C
s RECOMMENDED OPERATING CONDITIONS
Parameter Supply voltage 1 Supply voltage 2 Supply voltage 3 Analog output current Oscillator limit output capacitance Digital data setting range Operating temperature Symbol VCC GND VDD1 VSS1 VDD2 VSS2 IAL IAH COL Ta Conditions VCC VDD1 > VSS1 VDD1 - VSS1 2.0 V VCC VDD2 > VSS2 VDD2 - VSS2 2.0 V Source current Sink current Value Min. 4.50 2.00 0.00 2.00 0.00 0 0 #00 -20 Typ. 5.00 0 Max. 5.50 VCC 3.50 VCC 3.50 1.00 1.00 1.00 #FF +85 Unit V V V V V V mA mA F C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand.
13
MB88141A
s ELECTRICAL CHARACTERISTICS
1. DC Characteristics
(1) Digital Circuits (VCC = +5 V 10%, GND = 0 V, Ta = -20 C to +85 C) Symbol VCC ICC IILK VIL VIH VHYS VOH VOL1 "L" level output voltage VOL2 VOL3 (2) Analog Circuits 1 VCC SDA, SCL CS0, CS1 CS2, MOD D0 to D7 SDA, SCL D0 to D7 SDA Pin name Conditions SCL = 400 kHz, no load VIN = 0 to VCC IOH = -400 A IOL = 2.5 mA IOL = 3.0 mA IOL = 6.0 mA Value Min. 4.50 -10 0 0.70 VCC 0.05 VCC VCC - 0.4 Typ. 5.00 1.00 Max. 5.50 3.70 +10 0.30 VCC VCC 0.40 0.40 0.60 Unit V mA A V V V V V
Parameter Supply voltage Supply current Input leak current "L" level input voltage "H" level input voltage Input hysteresis width "H" level output voltage
(VCC = +5 V 10%, GND = 0 V, Ta = -20 C to +85 C) Symbol Pin name IDD VDD VDD1, VDD2 VSS1, VSS2 AO1 to AO12 Conditions No load IDD = IDD1 + IDD2 VDD1 - VSS1 2.0 V VDD2 - VSS2 2.0 V Value Min. 2.0 GND No load VDD1,VDD2 VCC - 0.1 V VSS1,VSS2 0.1 V -1.5 -1.0 Typ. 1.20 8 8 Max. 2.50 VCC 3.5 +1.5 +1.0 V bit bit LSB LSB Unit mA
Parameter Current consumption
Analog voltage Resolution Monotonic increase Non-linearity error Differential linearity error
VSS Res Rem LE DLE
14
MB88141A
Non-linearity error : Error in the input/output curve with respect to a straight line connecting output voltage at "00" and output voltage at "FF" levels. Differential linearity error : Deviation from ideal voltage with respect to a 1-bit increase in digital value.
Analog output Ideal linearity
VAOH
Non-linearity error VAOL Digital setting
#00
#FF
Note: VAOH and VDD, as well as VAOL and Vss are not necessarily the same values.
(3) Analog Circuits 2
(VCC = VDD1 = VDD2 = +5 V, GND = VSS1 = VSS2 = 0 V, Ta = -20 C to +85 C)
Symbol Pin name
Parameter Output minimum voltage 1 Output minimum voltage 2 Output minimum voltage 3 Output minimum voltage 4 Output minimum voltage 5 Output maximum voltage1 Output maximum voltage2 Output maximum voltage3 Output maximum voltage4 Output maximum voltage5
Conditions IAL = 0 A IAL = 500 A
Value Min. VSS Typ. VSS VSS VDD VDD Max. VSS + 0.1 VSS + 0.2 VSS + 0.2 VSS + 0.3 VSS + 0.3 VDD VDD VDD + 0.2 VDD VDD + 0.3
Unit V V V V V V V V V V
VAOL1 VAOL2 VAOL3 VAOL4 VAOL5 VAOH1 VAOH2 VAOH3 VAOH4 VAOH5 AO1 to AO12
VSS - 0.2 Digital data IAH = 500 A VSS "00" IAL = 1.0 mA VSS - 0.3 IAH = 1.0 mA IAL = 0 A IAL = 500 A VSS VDD - 0.1
VDD - 0.2 Digital data IAH = 500 A VDD - 0.2 "FF" IAL = 1.0 mA VDD - 0.3 IAH = 1.0 mA VDD - 0.3
15
MB88141A
2. AC Characteristics
Value Parameter SCL clock frequency Bus free time between "stop" condition and "start" condition Hold time (resend) "start" condition. The first clock pulse is generated after this interval. SCL clock low hold time SCL clock high hold time Resend "start" condition setup time Data hold time Data setup time SDA and SCL signal fall time SDA and SCL signal rise time "Stop" condition setup time Pulse width of spike suppressed by input filter Output fall time when Sink current 3mA bus capacitance is between 10 pF and Sink current 6mA 400 pF I2C bus line capacitance load D/A Analog output settling time Digital output delay time Input open time I/O expander Digital input setup time Digital input hold time *1: Load condition 1
Measurement point
ConSymbol dition fSCL tBUF tOF *1 *2 *3
Standard mode Min. 0 4.7 Max. 100 1000 300 250 400 100 300
High-speed mode Min. 0 1.3 Max. 400 0.9 300 300 50 250 250 400 100 300
Unit kHz
tHD ; STA tLOW tHIGH tSU ; STA tHD ; DAT tSU ; DAT tR tF tSU ; STO tSP
4.0 4.7 4.0 4.7 0 250 4.0 200 250 0.9
0.6 1.3 0.6 0.6 0 100 20 + 0.1 Cb 20 + 0.1 Cb 0.6 0 20 + 0.1 Cb 20 + 0.1 Cb 200 100 0.9
s
ns s
ns
Cb tDL ; AO tDL ; DO tDZ ; DI tSU ; DI tHD ; DI
pF s ns s
*2: Load condition 2
Measurement point
DUT RAL = 10 k CAL = 50 pF
DUT CAL = 50 pF
*3 : The I/O expander input open time value applies to a read operation following an I/O write operation, or to an I/O write operation following a read operation. 16
MB88141A
* Input/Output Timing
tHD ; STA Acknowledge tSU ; DAT tHD ; DAT 9 tHIGH tDZ ; DI tR tSU ; DI tF tHD ; DI Digital input tDZ ; DI tDL ; DO Digital output tDL ; AO tSP 18 Acknowledge tSU ; STA Sr tSU ; STO tHD ; STA P
tBUF
SDA
SCL
P
S tLOW
D0 to D7 D0 to D7 AO1 to AO12
Digital input
90% 10%
Analog output
Note: The discrimination levels are 70% and 30% of VCC.
17
MB88141A
s ORDERING INFORMATION
Part number MB88141AP MB88141APF MB88141APFV Package 24-pin plastic DIP (DIP-24P-M02) 24-pin plastic SOP (FPT-24P-M01) 24-pin plastic SSOP (FPT-24P-M03) Remarks
18
MB88141A
s PACKAGE DIMENSIONS
24-pin plastic DIP (DIP-24P-M02)
30.20 -0.30 1.189 -.012
+0.20 +.008
INDEX-1 13.550.25 (.533.010)
INDEX-2
0.51(.020)MIN
4.96(.195) MAX
3.00(.118) MIN 0.98 .039 1.27(.050) MAX
C
+0.50 -0 +.020 -0
0.250.05 (.010.002) 1.50 .059
+0.50 -0 +.020 -0
0.450.08 (.018.003)
2.54(.100) TYP
15.24(.600) TYP
15MAX
1994 FUJITSU LIMITED D24015S-2C-3
Dimensions in mm (inches)
(Continued)
19
MB88141A
(Continued) 24-pin plastic SOP (FPT-24P-M01)
+0.25 +.010
15.24 -0.20 .600 -.008
2.25(.089)MAX (Mounting height) 0.05(.002)MIN (STAND OFF)
INDEX
5.300.30 (.209.012)
7.800.40 (.307.016)
6.80 -0.20 .268 -.008
+0.40 +.016
1.27(.050) TYP
0.450.10 (.018.004)
O0.13(.005)
M
0.15 -0.02 .006 -.001 Details of "A" part
+0.05 +.002
0.500.20 (.020.008)
0.20(.008)
"A" 0.10(.004) 13.97(.550)REF
0.50(.020) 0.18(.007)MAX 0.68(.027)MAX
C
2000 FUJITSU LIMITED F24007S-3C-5
Dimensions in mm (inches) (Continued)
20
MB88141A
(Continued) 24-pin plastic SSOP (FPT-24P-M03)
* 7.750.10(.305.004)
Note) * marked dimensions do not include resin residues.
1.25 -0.10 .049 -.004
+0.20 +.008
(Mounting height)
0.10(.004)
* 5.600.10
INDEX (.220.004)
7.600.20 (.299.008)
6.60(.260) NOM
0.650.12(.0256.0047)
0.22 -0.05 .009
+0.10 +.004 -.002
"A"
0.15 -0.02 .006 -.001
+0.05 +.002
Details of "A" part 0.100.10(.004.004) (STAND OFF)
7.15(.281)REF
0
10
0.500.20 (.020.008)
C
2000 FUJITSU LIMITED F24018S-2C-3
Dimensions in mm (inches)
21
MB88141A
FUJITSU LIMITED
For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0721, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3386 http://edevice.fujitsu.com/ North and South America FUJITSU MICROELECTRONICS, INC. 3545 North First Street, San Jose, CA 95134-1804, U.S.A. Tel: +1-408-922-9000 Fax: +1-408-922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: +1-800-866-8608 Fax: +1-408-922-9179 http://www.fujitsumicro.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Am Siebenstein 6-10, D-63303 Dreieich-Buchschlag, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://www.fujitsu-fme.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LTD. #05-08, 151 Lorong Chuan, New Tech Park, Singapore 556741 Tel: +65-281-0770 Fax: +65-281-0220 http://www.fmap.com.sg/ Korea FUJITSU MICROELECTRONICS KOREA LTD. 1702 KOSMO TOWER, 1002 Daechi-Dong, Kangnam-Gu,Seoul 135-280 Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. The contents of this document may not be reproduced or copied without the permission of FUJITSU LIMITED. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipments, industrial, communications, and measurement equipments, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan.
F0101 (c) FUJITSU LIMITED Printed in Japan

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